An image display device (below referred to as a mechanical shutter type image display device) arranged with a pixel circuit which electrically controls the position of a mechanical shutter to display an image is used as described in US Patent 2008/0174532.
FIG. 14 is a circuit diagram which shows a pixel circuit of a conventional mechanical shutter type image display device.
A conventional mechanical shutter type image display device is explained below with reference to FIG. 14.
A signal line 206 is connected to each pixel 213. Specifically, the signal line 206 and a signal retaining capacitor 204 of each pixel 213 are connected via a scanning switch 205.
The signal retaining capacitor 204 is further connected to a gate of an nMOS transistor 203 for programming a shutter negative voltage. The drain of the nMOS transistor 203 for programming a shutter negative voltage is connected to the drain of a pMOS transistor 202 for programming a shutter positive voltage, via a cascode nMOS transistor 216 and a cascode pMOS transistor 215.
Each pixel 213 includes a dual actuator shutter assembly 201 connected to a shutter voltage line 211. One of two control electrodes of the dual actuator assembly 201 is connected to a drain of the nMOS transistor 203 for programming a shutter negative voltage via the cascode nMOS transistor 216. The other control electrode is connected to a control electrode voltage line 209.
The other end of the signal retaining capacitor 204 is connected to the shutter voltage line 211. A source of the nMOS transistor 203 for programming a shutter negative voltage is connected to an nMOS transistor source voltage line 212 for programming a shutter negative voltage. The gate and drain of the pMOS transistor 202 for programming a shutter positive voltage are connected to a pMOS gate voltage line 207 for programming a shutter positive voltage and a positive voltage line 208 respectively. The gate of the cascode nMOS transistor 216 and the gate of the cascode pMOS transistor 215 are connected to a cascode gate voltage line 217. The gate of the scanning switch 20-5 is connected to a scanning line 210.
The dual actuator shutter assembly 201 is arranged facing an aperture punctured into a light blocking surface. A plurality of pixels 213 having structures as described above are arranged in a matrix shape in the image display device.
Next, the operation of an image display device applied with a conventional mechanical shutter is explained.
An image signal voltage applied to a signal line 206 is stored in the signal retaining capacitor 204 of each pixel 213 via the scanning switch 205 of each pixel 213 by scanning the scanning lines 210 in sequence.
Next, after programming an image signal voltage to the signal retaining capacitor 204 of all the pixels 213 is completed, an image signal is written to one of the two control electrodes of the dual actuator shutter assembly 201 based on the written image signal voltage in each pixel 213. That is, first, in all of the pixels 213, by applying a low voltage for a certain period of time to the pMOS gate voltage line 207 for programming a shutter positive voltage, the pMOS transistor 202 for programming a shutter positive voltage is switched to an ON state for only this period of time and a certain voltage applied to the positive voltage line 208 is precharged to one of the two control electrodes of the dual actuator shutter assembly 201.
Next, a low voltage is applied for a certain period of time to the nMOS source voltage line 212 for programming a shutter negative voltage. Then, the nMOS transistor 203 for programming a shutter negative voltage is switched to an ON state for this period of time only in the pixel 213 in which a high voltage is written to the signal retaining capacitor 204 as an image signal voltage and thereby a voltage written to one of the two control electrodes of the dual actuator shutter assembly 201 is converted to a certain low voltage applied to the nMOS source voltage line 212 for programming a shutter negative voltage.
In addition, in a pixel in which a low voltage is written to the signal retaining capacitor 204 as an image signal voltage, because the nMOS transistor 203 for programming a shutter negative voltage is kept in an OFF state during this period of time, the voltage of one of the two control electrodes of the dual actuator shutter assembly 201 is maintained at the already precharged certain positive voltage.
In this way, although amplification programming of an image signal is performed to one of two control electrodes of the dual actuator shutter assembly 201, at the same time the dual actuator shutter assembly 201 is electrostatically operated by controlling the voltage applied to the control electrode voltage line 209. Because the dual actuator shutter assembly 201 which operates in the way controls the amount of light which passes through the aperture by opening and closing the aperture arranged on a light blocking surface, the image display device can display an image corresponding to a written image signal voltage on an a pixel matrix.
Furthermore, in the operation described above, the cascode nMOS transistor 216 and the cascode pMOS transistor 215 are arranged in order to prevent a high drain voltage having a short lifespan from being applied to the pMOS transistor 202 for programming a shutter positive voltage and the nMOS transistor 203 for programming a shutter negative voltage.
In the pixel circuit of a conventional mechanical shutter type image display device, it was necessary to arrange the cascode nMOS transistor 216 and cascode pMOS transistor 215 in order to prevent deterioration caused by applying a high voltage to the drain of the pMOS transistor 202 for programming a shutter positive voltage and the nMOS transistor 203 for programming a shutter negative voltage.
Although it is necessary to simplify a pixel circuit in order to be compatible with high definition of an image display device, a cascode transistor is essential for high reliability in a pixel circuit of a conventional mechanical shutter type image display device. However, simultaneously attaining both high definition and high reliability was difficult.
That is, accomplishment of both high definition and high reliability as a result of the simplification of a pixel circuit while maintaining high image quality which is the asset of a conventional mechanical shutter type image display device such as high contrast and good color reproducibility and low power consumption was being demanded.
The present invention was performed as a response to these demands. The aim of the present invention is to provide a technology which can achieve both high definition and high reliability as a result of the simplification of a pixel circuit while maintaining high image quality which is the asset of a conventional mechanical shutter type image display device.
The aim of the present invention described above and other aims and new characteristics will be made clear by the descriptions of the present specification and attached diagrams.